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Chips '26: Semiconductor Design Software (EDA) (open on stockthemes)

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Theme thesis · 3/5 sections · Tickers 4 with notes · 4 pending

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Bull / Bear Details has the investment thesis and bull/bear points. Overview is monitoring guidance (hiring, forums, second-order trends, search keywords, Google Trends, datasets).

Bull / Bear Details

Electronic design automation software enables semiconductor companies to design, simulate, verify, optimize, and implement increasingly complex integrated circu

Thesis

Electronic design automation software enables semiconductor companies to design, simulate, verify, optimize, and implement increasingly complex integrated circuits. Advanced manufacturing nodes, custom AI accelerators, heterogeneous chiplets, high-bandwidth interconnects, and sophisticated packaging architectures increase design complexity and the need for comprehensive software workflows. Leading EDA suppliers benefit from high switching costs, entrenched engineering ecosystems, recurring software licenses, and rising design requirements, while emerging competitors pursue domestic semiconductor design independence. However, export restrictions, concentrated customer spending, open-source tools, and automation-driven pricing changes create risks.

Bull case

  • Rising Chip Complexity Expands EDA Spending: Advanced process nodes, custom accelerators, heterogeneous architectures, chiplets, and advanced packaging increase the number and difficulty of design, simulation, verification, and signoff tasks, supporting greater demand for sophisticated EDA software.

  • AI-Assisted Engineering Improves Productivity and Platform Value: Automated design optimization, intelligent verification, AI-driven placement and routing, and integrated multiphysics simulation can reduce engineering time and support increased software adoption across semiconductor design workflows.

  • High Switching Costs and Semiconductor Localization Support Growth: Extensive tool integration, proprietary design methodologies, and demanding qualification requirements support established EDA vendors, while domestic semiconductor initiatives create opportunities for emerging regional design software suppliers.

Bear case

  • Export Restrictions and Geopolitical Fragmentation Threaten Revenue: Restrictions on advanced semiconductor design tools, technology transfers, and cross-border software distribution can limit access to important markets and disrupt established customer relationships.

  • Customer Concentration and Design Cycle Volatility Pressure Growth: Semiconductor development spending depends on customer research budgets, major chip programs, and capital availability, while delayed designs or canceled projects can weaken license demand and growth.

  • Open-Source Tools and AI Automation Could Change Competitive Economics: Emerging open-source design flows, improved automated engineering tools, and customer-developed software could increase pricing pressure or reduce the differentiation of established EDA platforms over time.

Overview

Hiring Trend Watchpoints

1. Domain Rebalancing: Leading EDA vendors (Cadence, Synopsys, Siemens EDA) are pivoting hiring away from traditional rule-based scripting toward Agentic AI researchers, LLM fine-tuning engineers, and GPU-accelerated algorithm specialists to power platforms like ChipStack, AuraStack, and AgentEngineer. 2. Application Engineering (AE) Productivity: Monitor headcount in Application Engineering relative to revenue growth; high performers report that agentic EDA workflows are automating routine testbench generation and RTL debug, allowing companies to scale customer engagements with moderated AE hiring. 3. Post-Merger Integration & Talent Retention: For Synopsys, watch headcount turnover in legacy Ansys simulation units; successful execution requires retaining specialized multiphysics modeling talent while eliminating overlapping corporate and G&A overhead. 4. Geographic R&D Relocation: Job postings in mainland China are flattening or concentrating strictly on domestic trailing-node support due to export controls, with leading-edge EDA R&D requisitions shifting visibly to India (Bangalore, Noida), Europe, and North America. 5. Signals: A surge in multi-agent orchestration and multiphysics solver job requisitions confirms theme execution; sudden freezes in core EDA R&D or elevated attrition among senior verification engineers would warn of competitive deterioration.

Forum Watchlist

  • reddit — r/chipdesignhigh

    Practitioner feedback on agentic AI capabilities (Cadence ChipStack vs Synopsys AgentEngineer), tool license cost resistance, and advanced node (N2/A16) design rule checks

  • niche_forum — SemiWiki.comhigh

    Foundry EDA qualification notices, competitive benchmarking between Cadence, Synopsys, and Siemens EDA, and customer case studies on multiphysics signoff

  • niche_forum — DeepChip.comhigh

    Unfiltered customer reviews on emulation and hardware-assisted verification reliability (Palladium Z3 vs ZeBu), EDA pricing structures, and runtime bugs

  • reddit — r/ECEmedium

    Academic and early-career engineer tool sentiment, university licensing shifts, and open-source EDA tool adoption vs commercial tool lock-in

  • research_repository — arXiv.org (cs.AR / cs.AI)medium

    Academic and industrial research preprints on LLM-based autonomous circuit generation, agentic EDA protocols (EACP), and reinforcement learning for physical design closure

Industry Publications

  • SemiEngineering (semiengineering.com) — Premier technical trade analysis covering EDA flows, advanced packaging architectures, chiplet standards, and verification bottlenecks.
  • EE Times (eetimes.com) — Comprehensive reporting on semiconductor design industry dynamics, vendor product launches, and IP ecosystem partnerships.
  • SemiWiki (semiwiki.com) — In-depth editorial analysis and insider community discussions tracking EDA platform roadmaps, foundry PDK certifications, and market share shifts.
  • Electronics Weekly (electronicsweekly.com) — Timely updates on European and Asian chip design starts, semiconductor supply chain developments, and embedded design software trends.
  • IEEE Spectrum (spectrum.ieee.org) — Authoritative coverage of emerging semiconductor physics, transistor scaling transitions (GAA, CFET, backside power), and computational design software breakthroughs.

Second Order Trends

1. Transition from Seat Licensing to 'Agentic' Consumption Models: The rise of autonomous AI design agents (Cadence ChipStack/AuraStack, Synopsys AgentEngineer, Siemens Fuse EDA AI Agent) that perform days of engineering autonomously is pushing EDA monetization toward token-, run-, or outcome-based pricing rather than seat counts alone. 2. Silicon-to-Systems Multiphysics Convergence: Advanced heterogeneous packaging (3D-IC, CoWoS, glass substrates) means electrical, thermal, electromagnetic, and mechanical stresses cannot be treated as downstream checks; platforms like Synopsys Multiphysics Fusion (via Ansys) and Cadence AuraStack are unifying physics simulation directly into early logical implementation. 3. Hyperscaler Custom ASIC Dominance: Cloud hyperscalers (CSP-owned tooling) developing custom silicon are driving outsized demand for hardware-assisted emulation platforms (Palladium Z3, Protium X3, ZeBu) and pre-verified interconnect IP (UCIe, HBM3e/HBM4, PCIe 7.0). 4. Domestic EDA Bifurcation in China: Heightened export controls on sub-14nm EDA software are entrenching domestic Chinese vendors (Empyrean, Primarius) in local foundries and mature-node designs, creating a two-track global ecosystem.

Search Keywords Brand Product

  • ChipStack AI Super Agent
  • AuraStack AI Super Agent
  • AgentEngineer
  • Multiphysics Fusion
  • Palladium Z3
  • Protium X3
  • ZeBu
  • HAPS-200
  • Fuse EDA AI Agent
  • 3DIC Compiler
  • Fusion Compiler
  • PrimeTime
  • Virtuoso
  • Calibre
  • Spectre FX
  • Allegro X AI
  • Ansys RedHawk-SC
  • PathWave Design
  • Altium Designer
  • Verisium
  • electronic design automation
  • EDA software
  • chip design software
  • agentic AI EDA
  • multiphysics simulation
  • advanced packaging 3D-IC
  • semiconductor IP licensing
  • hardware-assisted verification
  • RTL verification
  • physical design closure

Search Keywords Policy Regulatory

  • EDA export controls
  • semiconductor software sanctions
  • Bureau of Industry and Security export rules
  • CHIPS and Science Act R&D
  • ITAR semiconductor design
  • China domestic EDA localization

Search Keywords Event Phrases

  • Design Automation Conference
  • DAC 2026
  • Synopsys Converge
  • CadenceLIVE
  • Synopsys Users Group SNUG
  • IEEE International Solid-State Circuits Conference
  • COMPUTEX EDA announcements

Google Trend Product Category Intent

• Cadence Virtuoso • Synopsys PrimeTime • Siemens Calibre • Cadence Palladium • Synopsys 3DIC Compiler • Altium Designer • Cadence AuraStack

Google Trend Consumer Intent

• what is EDA software • learn chip design • VLSI design course • how to design an ASIC • Verilog testbench tutorial • semiconductor simulation tools

Google Trend Macro Policy Terms

• EDA export restrictions • China chip design software • AI chip design tools • semiconductor IP market

Economic Data Watch

1. FRED — Federal Reserve Economic Data

Matchedfred · access=api · map_only

Cadence monthly

Why it matters Global semiconductor sales directly reflect the health and investment levels within the industry that EDA software serves, indicating overall demand for chip design tools.

Signal to watch Sustained growth or acceleration in sales is bullish; deceleration or decline is bearish.

Confidence: low

2. Gartner / IDC — Worldwide Data Center Capital Expenditure Forecast

Matchedgartner_vendor_market_share_data · access=file · map_only

Metric/field Global Data Center Capital Expenditure (USD billions)

Cadence quarterly

Why it matters Increased data center investment, especially for AI infrastructure, drives demand for advanced, custom chips and thus EDA software for their design.

Signal to watch Upward revisions or strong growth in capex forecasts are bullish; downward revisions or stagnation are bearish.

Confidence: medium

3. FRED — Federal Reserve Economic Data

Matchedfred · access=api · map_only

Cadence monthly

Why it matters The ISM Manufacturing PMI reflects the overall health and expansion/contraction of the manufacturing sector, which impacts demand for electronic components and the chips designed with EDA tools.

Signal to watch PMI consistently above 50 is bullish; below 50 or declining is bearish.

Confidence: low

4. Trading Economics — China Economic Indicators

Not in registryaccess=scrape

Metric/field China Industrial Production

Cadence monthly

Why it matters China is a significant market for semiconductor design and manufacturing, with domestic EDA capabilities growing. Its industrial production indicates overall economic activity and demand for electronics.

Signal to watch Stronger-than-expected industrial production growth is bullish; weaker growth is bearish.

Confidence: high

5. FRED — Federal Reserve Economic Data

Matchedfred · access=api · map_only

Cadence monthly

Why it matters The Producer Price Index for Semiconductor and Other Electronic Component Manufacturing reflects pricing power and cost pressures within the core industry served by EDA, impacting investment in design.

Signal to watch Rising PPI indicates strong demand or pricing power (bullish); falling PPI suggests oversupply or weak demand (bearish).

Confidence: low

Free Alt Data Watch

1. Google Trends — Search Interest Data

Not in registry

Metric/field Search Interest Index for 'Electronic Design Automation' + 'AI chip design' (Worldwide, 90-day average)

Cadence daily

Why it matters Reflects public and industry interest in core EDA concepts and the growing focus on AI in chip design, indicating potential future demand and investment.

Signal to watch Rising search interest is bullish; declining or stagnant interest is bearish.

Confidence: medium

2. Indeed Hiring Lab — Job Postings Data

Matched (medium)engine_advertising_brand_tracking · access=file · map_only

Metric/field Job postings for 'EDA Engineer' or 'Semiconductor Design Engineer' (Global)

Cadence monthly

Why it matters Increased hiring for EDA and semiconductor design roles signals anticipated growth in R&D and design activity, which directly drives demand for EDA software.

Signal to watch Rising job postings are bullish; declining postings are bearish.

Confidence: medium

3. USPTO PatentsView — Patent Grants and Applications

Not in registry

Metric/field Patent applications/grants by assignee (Cadence, Synopsys, Siemens EDA) or CPC class (e.g., G06F17/50 for CAD/EDA)

Cadence quarterly

Why it matters Patent activity indicates innovation and R&D investment by key players, suggesting future product development and competitive positioning in EDA and AI-driven design.

Signal to watch Increased patent filings or grants are bullish; stagnation or decline is bearish.

Confidence: high

4. GitHub — Open-Source Project Activity

Not in registry

Metric/field Stars, commits, and contributors for key open-source EDA projects (e.g., OpenLane, SkyWater PDK related tools)

Cadence daily

Why it matters Growing activity in open-source EDA projects could indicate emerging trends, community engagement, or potential competitive shifts, though established players have high switching costs.

Signal to watch Increased stars, commits, and contributors are bullish for open-source adoption; declining activity is bearish.

Confidence: low

5. SEC EDGAR — 8-K Filings Full-Text Search

Matched (medium)semi_semiconductor_equipment_billings · access=file · map_only

Metric/field Mentions of 'EDA', 'semiconductor design', 'AI chip' in 8-K filings by major semiconductor companies

Cadence event_driven

Why it matters Provides real-time insights into strategic partnerships, significant customer wins, or new product developments related to EDA and AI chip design from public company announcements.

Signal to watch Frequent positive mentions or new collaborations are bullish; lack of mentions or negative news is bearish.

Confidence: high

Paid Alt Data Watch

1. SpendHound — B2B SaaS and AI Procurement Intelligence

Matchedspendhound_b2b_saas_ai_vendor_spend · access=file · map_only

Metric/field Customer spend on 'Cadence Design Systems' software licenses and 'EDA tools' by hyperscalers/semiconductor firms (USD)

Cadence monthly

Why it matters Directly tracks actual enterprise spending on EDA software, providing insight into customer adoption and budget allocation by key clients.

Signal to watch Increasing spend or new customer acquisitions are bullish; declining spend or churn is bearish.

Confidence: high

2. Coresignal / Revelio Labs — Workforce Intelligence

Matchedcoresignal_job_postings · access=file · map_only

Metric/field Active Job Postings (Global) for 'EDA Engineer', 'AI Chip Designer', 'Verification Engineer' roles in semiconductor industry

Cadence monthly

Why it matters Provides granular insight into hiring trends for critical skills, indicating where semiconductor companies are investing their R&D and design resources.

Signal to watch Growth in relevant job postings is bullish; stagnation or decline is bearish.

Confidence: high

3. Supplyframe — Component Pricing & Lead Times

Matchedsupplyframe_electronic_components_pricing · access=file · map_only

Metric/field Lead times and pricing for advanced logic ICs (e.g., 7nm, 5nm) and HBM memory components

Cadence daily

Why it matters Lead times and pricing for advanced components reflect overall semiconductor demand and production health, indirectly influencing the need for EDA tools to design these complex chips.

Signal to watch Extended lead times and rising prices (due to high demand) are bullish; shortening lead times and falling prices (due to oversupply or weak demand) are bearish.

Confidence: high

4. IDC / Gartner — Electronic Design Automation (EDA) Software Market Share and Forecasts

Matchedgartner_it_spending_market_forecasts · access=file · map_only

Metric/field EDA Software Market Size (USD billions) and Year-over-Year Growth Rate

Cadence annual

Why it matters Provides a comprehensive view of the overall market health, competitive landscape, and future growth trajectory for the EDA industry.

Signal to watch Upward revisions to market size or growth forecasts are bullish; downward revisions are bearish.

Confidence: high

5. Industrial Info Resources (IIR) — Industrial Project Database

Matched (medium)industrial_info_resources_industrial_projects_capex · access=file · map_only

Metric/field New semiconductor fabrication plant projects (value, status) and major data center construction projects (value, status)

Cadence monthly

Why it matters Tracks capital investment in new manufacturing capacity and data center infrastructure, which are direct drivers of demand for advanced chip design and EDA tools.

Signal to watch Increase in new project announcements or project values is bullish; delays or cancellations are bearish.

Confidence: high

Prediction Market Watch

1. US semiconductor production growth in 2026?

Kalshi · Confidence: high

Matched (medium)semi_semiconductor_equipment_billings · access=file · map_only

Market https://kalshi.com/markets/kxsemiprodh

Why it matters Higher US semiconductor production growth directly indicates increased domestic chip manufacturing activity, which in turn drives greater demand for Electronic Design Automation (EDA) software used to design these complex chips. This benefits theme constituents like Cadence and Synopsys, whose tools are essential for advanced semiconductor engineering workflows.

Series key kalshi_us_semi_prod_growth

2. Which bills will become law in 2026?

Polymarket · Confidence: high

Not in registryaccess=api

Market https://polymarket.com/event/which-bills-will-become-law-in-2026

Why it matters The passage of bills related to AI-chip export licensing and export-control chip security is directly relevant to the 'Export Restrictions and Geopolitical Fragmentation Threaten Revenue' bear case for the EDA theme. Stricter controls could limit access to key markets for advanced semiconductor design tools, impacting revenue for global EDA providers like Cadence and Synopsys, while also potentially creating opportunities for domestic EDA suppliers in regions like China.

Series key pm_export_control_chip_security

3. Americas data center capacity at the end of 2026

Kalshi · Confidence: medium

Not in registryaccess=api

Market https://kalshi.com/markets/kxusdccapacity

Why it matters Increased data center capacity, particularly in the Americas, signals robust and sustained demand for advanced AI accelerators and custom silicon. This directly translates to higher demand for sophisticated Electronic Design Automation (EDA) software from companies like Cadence and Synopsys, as these tools are critical for designing the complex chips required for hyperscale AI infrastructure.

Series key kalshi_americas_dc_capacity

Theme Plain English
Electronic design automation (EDA) software provides the mission-critical tools engineers use to design, simulate, verify, and test complex microchips and electronic systems [CDNS, SNPS]. Driven by custom AI accelerators, sub-2nm process nodes, multi-die chiplets, and advanced packaging, chip design has exceeded manual human capability [CDNS, SNPS]. EDA vendors capture highly recurring, high-margin software revenues by automating front-end logic, multiphysics physics signoff, and autonomous agentic AI engineering workflows.
Upcoming Catalysts15 rows
Catalyst IDEstimated TimingEstimated Date StartEstimated Date EndCatalystWhy It MattersTicker Or Theme SpecificTranscript DateSource TypeCatalyst Source
CDNS_4c28e242Q4 20262026-10-012026-12-31Samsung Electronics is targeting mass production of its CXL Memory Module-DRAM (CMM-D) 3.0, based on the CXL 3.2 specification.Samsung's mass production of advanced CXL memory modules is a critical step for hyperscale adoption, directly enabling projects designed to eliminate stranded memory and improve data center efficiency. Cadence benefits as CXL chip designs utilize its EDA tools and CXL VIP, increasing EDA tool usage per design.Theme2026-07-27earnings_transcriptCDNS (ticker)
6723.T_d0262d91towards the second half2026-07-012026-12-31The actual impact of the anticipated DRAM shortage on Renesas' Industrial/Infrastructure/IoT (IIoT) business performance.A severe DRAM shortage could constrain IIoT product shipments, potentially leading to lower-than-expected revenue and impacting margins, especially if it leads to a shift towards higher-end models or an inability to meet demand.Ticker2026-02-04earnings_transcript6723.T (ticker)
6723.T_f6e52836by the end of this year at the latest2026-04-012026-12-31Completion of the timing business transfer, including regulatory approvals, and the subsequent decision on the allocation of the $3 billion in proceeds (growth investments vs. debt repayment and shareholder returns).Successful completion and strategic allocation of proceeds could boost investor confidence and potentially fund future growth initiatives or enhance shareholder value. Delays or unfavorable allocation could negatively impact sentiment.Ticker2026-02-04earnings_transcript6723.T (ticker)
6723.T_36768e25second half of the year2026-07-012026-12-31The actual trajectory of automotive demand in the second half of 2026, influenced by macro uncertainties (e.g., crude oil prices, consumer spending) and new platform launches.While Renesas has a relatively optimistic view and plans to build channel inventory, the overall macro uncertainty for automotive demand could impact revenue, guidance, and investor sentiment for this key segment.Theme2026-04-23earnings_transcript6723.T (ticker)
6723.T_bdbdd1a8at some point in time2026-07-012026-12-31Renesas potentially adjusting product prices upwards in response to rising raw material, transportation, and manufacturing costs, as well as competitor price increases.Price adjustments could help maintain or improve gross margins in an inflationary environment. Failure to adjust prices could lead to margin erosion, while aggressive increases could impact customer relationships or market share.Ticker2026-04-23earnings_transcript6723.T (ticker)
SIE.XETRA_a4ba525cAugust 2026 - December 20262026-08-012026-12-31Regional Transmission Organizations (RTOs) to respond to FERC's June 18, 2026 orders to justify or reform their large-load interconnection tariffs, particularly for data centers, and continue implementing FERC Order 2023 reforms.These actions are critical for unlocking project pipelines, accelerating construction timelines, and improving profitability for developers and contractors involved in grid expansion and renewable integration, especially given the surging demand from AI data centers.Theme2026-08-06earnings_transcriptSIE.XETRA (ticker)
SNPS_3fc73aacin 20262026-01-012026-12-31Delivery of GPU‑accelerated EDA/Ansys products and Omniverse integrations under the NVIDIA partnership (management expects 'a number' of these products to be delivered in 2026).GPU-accelerated tools and Omniverse connectors could materially improve performance, customer value and pricing power (bullish); failure to ship meaningful GPU-accelerated offerings or limited customer uptake would undermine expected product differentiation and upside from the NVIDIA partnership (bearish).Ticker2026-02-25earnings_transcriptSNPS (ticker)
SNPS_31241200a little bit more Q4 weighted / toward the latter part of the year2026-08-012026-10-31Availability and customer monetization (tape-outs/licenses) of key Design IP titles (HPC/interface IP) that management said are on track and expected to be Q4‑weighted.On‑time, silicon‑proven delivery and monetization would drive the expected back‑half recovery in the IP segment and reduce the 'transitional year' risk (bullish); further delays would keep IP revenue muted, pressuring FY26 growth and margins (bearish).Ticker2026-02-25earnings_transcriptSNPS (ticker)
SNPS_c4a5d766Board authorized to purchase up to $2 billion (opportunistic repurchases)2026-02-252026-10-31Execution (timing and magnitude) of the newly replenished $2.0 billion stock repurchase authorization the Board approved following term‑loan repayment.Material repurchases would reduce share count and be EPS‑accretive and signal confidence in cash generation (bullish); minimal or delayed repurchases (or diversion of cash to other uses) would reduce the near‑term EPS lift and could signal more conservative capital allocation (bearish).Ticker2026-02-25earnings_transcriptSNPS (ticker)
SNPS_4e16e439second half of 20262026-07-012026-12-31Commercial availability ramp of Multiphysics Fusion technology, with monetization expected to start in fiscal year 2027.This product ramp is expected to drive meaningful productivity gains for customers and allow Synopsys to share in value creation, impacting EDA revenue and margins, and contributing to Ansys revenue synergies.Ticker2026-05-27earnings_transcriptSNPS (ticker)
SNPS_503817f4by the end of this fiscal year [FY26]2026-06-102026-10-31Signing of agreements with a few customers for a new, higher-value IP business model, particularly with hyperscalers for HPC and AI-based chips.These initial agreements are crucial proof points for the new IP monetization strategy, aiming to capture more value and accelerate growth in the IP segment, positively impacting revenue and margins.Ticker2026-05-27earnings_transcriptSNPS (ticker)
SNPS_9fff1ee6as agents become more pervasive in our customers' workflow2026-06-102027-12-31Evolution of the monetization model for AI-driven EDA capabilities to a subscription-plus-consumption model.A successful shift to a new monetization model for agentic AI could significantly increase value capture and drive higher revenue and margins for the EDA and S&A businesses.Ticker2026-05-27earnings_transcriptSNPS (ticker)
SNPS_03c56394as these wins move from an eval into production2026-06-102027-12-31Conversion of Intel Foundry and other advanced node evaluations into production commitments for Synopsys IP.This would provide upside to IP revenue beyond current guidance, as Synopsys gets paid once customers commit to production, signaling strong demand for their foundational and interface IP at advanced nodes.Ticker2026-05-27earnings_transcriptSNPS (ticker)
SNPS_db23c661monetization of the joint solution to start in FY '272026-11-012027-10-31Initial revenue recognition / commercial sales from Synopsys‑Ansys joint solutions, which management expects to begin in fiscal 2027.If monetization begins in FY27 as guided, it provides an early revenue tail to justify merger rationale and the stated revenue synergies; failure to monetize on schedule would delay revenue upside and weaken the merger ROI thesis (bearish).Ticker2026-02-25earnings_transcriptSNPS (ticker)
6723.T_af670256beginning of next year2027-01-012027-03-31New capacity from the JPY 94 billion CapEx decision (80% for capacity expansion in AI, data center, digital power at Kofu, Naka, Saijo factories, and back-end processes) starting to contribute to production.Increased capacity is crucial for Renesas to capture strong demand, especially in AI/data center and digital power, and to resolve supply constraints in the long term, supporting revenue growth and market share.Ticker2026-04-23earnings_transcript6723.T (ticker)

Constituents

  • — Cadence Design Systems, Inc.
  • — Renesas Electronics Corporation
  • — Siemens AG
  • — Synopsys, Inc.
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